Plasmas are widely used for a variety of treatment and layer deposition tasks in semiconductor fabrication and other thin film applications. These applications include subtractive processes such as wafer precleaning, contaminant removal, native oxide removal, photoresist removal, plasma etching, as well as treatment processes such as oxidation, nitridation, or hydridation of a layer both during and after formation. “Remote” plasma sources are frequently used, where the plasma is located at some distance from the surface to be treated or substrate on which a layer is being formed. The distance allows some filtering of the charged particles in the plasma. For example, the density of electrons and ions can be adjusted or removed from the generated plasma.
As integrated circuit feature sizes decrease, other device dimensions also decrease to maintain the proper device operation. For example, as gate conductor widths decrease, the thickness of the gate dielectric needs to decrease to provide proper capacitance to control the transistor.
To meet the requirements of sub-20 nm devices, an equivalent oxide thickness (EOT) of less than 1.5 nm is needed. Using SiO2 as the gate dielectric, it is difficult to maintain its dielectric property below about 2 nm thickness due to the high leakage due to tunneling.
High-k materials, (e.g., dielectric materials having a dielectric constant k greater than that of SiO2 (k˜3.9)), can provide high capacitance with higher thickness, and thus have been investigated as a replacement for SiO2. For example, a high-k value of 20, which can be obtained with various transition metal oxides such as hafnium oxide, can be about five times thicker than a SiO2 film with similar capacitance value. The thicker gate dielectric layer of the high-k material can reduce tunneling leakage current through the gate, enabling sub-20 nm MOSFET devices.
The fabrication of high-k gate dielectric layers can provide difficulty in realizing the full benefits of the high dielectric constant. For example, processing high-k dielectric layers in the presence of oxygen at elevated temperatures, (e.g., high-k deposition or subsequent anneal processes), can form a SiO2 interfacial layer between the silicon substrate and the high-k layer. The SiO2 interfacial layer can increase the effective oxide thickness, reducing the capacitance of the gate dielectric layer. Further, high-k gate dielectrics can contain a greater number of bulk traps and interface traps than thermally grown SiO2 gate dielectrics. The traps can degrade the device performance by mechanisms such as sub-threshold slope, threshold voltage, flatband voltage shift, and Frenkel-Poole tunneling leakage.
Logic devices are increasingly using germanium-based layers as the semiconductor channel in advanced transistors. The germanium-based layers may include germanium or silicon-germanium alloys. Germanium oxidizes more easily than silicon when exposed to ambient conditions. Further, the germanium oxides exhibit reduced stability when compared to the silicon oxides. Typically, these oxides must be removed before the formation of the transistor gate stack and/or the source and drain contacts to the transistor. The native oxide formed on the germanium surface can be removed using plasma treatments with hydrogen. However, the cleaned surface is not ideal for the nucleation of precursors used in the deposition of high-k layers such as aluminum oxide or hafnium oxide.
What is needed is a system and methods that enable the repeatable and controllable deposition of thin films used in the manufacture of microelectronic devices, such as the use of direct or remote plasmas to condition the surface of materials present on semiconductor surfaces prior to further processing.